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Page 62 Epson Research and Development
Vancouver Design Center
S1D13708 Programming Notes and Examples
X39A-G-003-01 Issue Date: 01/11/20
ADVANCE
D
IN
F
ORMATION
Subje
ct to C
ha
nge
8.4 Limitations
8.4.1 SwivelView 0° and 180°
The PIP
+
Line Address Offset registers (REG[81h],REG[80h]) requires the PIP
+
window
image width to be a multiple of 32 ÷ bits-per-pixel. If this formula is not satisfied, then the
PIP
+
Line Address Offset register must be programmed to the next larger value that
satisfies the formula.
8.4.2 SwivelView 90° and 270°
The PIP
+
Line Address Offset register (REG[81h],REG[80h]) requires the PIP
+
window
image width to be a multiple of 32 ÷ bits-per-pixel. If this formula is not satisfied, then the
PIP
+
Line Address Offset register must be programmed to the next larger value that
satisfies the formula.