Xilinx 1.8 Medical Alarms User Manual


 
Endpoint Block Plus v1.8 for PCI Express www.xilinx.com 21
UG343 June 27, 2008
Directory Structure and File Contents
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<project directory>
The project directory contains all the CORE Generator project files.
<project directory>/<component name>
The component name directory contains the release notes readme file provided with the
core, which may includes tool requirements, last-minute changes, updates, and issue
resolution.
<component name>/doc
The doc directory contains the PDF documentation provided with the core.
Table 3-1: Project Directory
Name Description
<project_dir>
<component_name>.ngc
Top-level netlist.
<component_name>.v[hd]
Verilog or VHDL simulation model.
<component_name>.xco
CORE Generator project-specific option file; can be
used as an input to the CORE Generator.
<component_name>_flist.txt
List of files delivered with core.
<component_name>.{veo|vho}
Verilog or VHDL instantiation template.
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Table 3-2: Component Name Directory
Name Description
<project_dir>/<component_name>
pcie_blk_plus_readme.txt
Release notes file.
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Table 3-3: Doc Directory
Name Description
<project_dir>/<component_name>/doc
pcie_blk_plus_ds551.pdf
LogiCORE IP Endpoint Block Plus for PCI Express Data
Sheet
pcie_blk_plus_gsg343.pdf
LogiCORE IP Endpoint Block Plus for PCI Express Getting
Started Guide
pcie_blk_plus_ug341.pdf
LogiCORE IP Endpoint Block Plus for PCI Express User
Guide
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