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S3C8245/P8245/C8249/P8249 CONTROL REGISTER
4-17
LMOD — LCD Mode Control Register D1H Set 1
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
nRESET Value 0 0 0 0 0 0 0 0
Read/Write – – R/W R/W R/W R/W R/W R/W
Addressing Mode Register addressing mode only
.7–.6 Not used for the S3C8245/C8249
.5–.4 LCD Clock (LCDCK) Frequency Selection Bits
0 0
32.768 kHz watch timer clock (fw)/2
9
= 64 Hz
0 1
32.768 kHz watch timer clock (fw)/2
8
= 128 Hz
1 0
32.768 kHz watch timer clock (fw)/2
7
= 256 Hz
1 1
32.768 kHz watch timer clock (fw)/2
6
= 512 Hz
.3–.0 Duty and Bias Selection for LCD Display
0 x x x LCD display off (COM and SEG output low)
1 0 0 0 1/4 duty, 1/3 bias
1 0 0 1 1/3 duty, 1/3 bias
1 0 1 1 1/3 duty, 1/2 bias
1 0 1 0 1/2 duty, 1/2 bias
1 1 x x Static