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S3C8245/P8245/C8249/P8249 16-BIT TIMER 0/1
12-1
12 16-BIT TIMER 0/1
16-BIT TIMER 0
OVERVIEW
The 16-bit timer 0 is an 16-bit general-purpose timer. Timer 0 has the interval timer mode by using the appropriate
T0CON setting.
Timer 0 has the following functional components:
— Clock frequency divider (fxx divided by 256, 64, 8 or 1) with multiplexer
— TBOF (from timer B) is one of the clock frequencies.
— 16-bit counter (T0CNTH/L), 16-bit comparator, and 16-bit reference data register (T0DATAH/L)
— Timer 0 interrupt (IRQ2, vector E6H) generation
— Timer 0 control register, T0CON (set 1, Bank 1, F1H, read/write)
FUNCTION DESCRIPTION
Interval Timer Function
The timer 0 module can generate an interrupt, the timer 0 match interrupt (T0INT). T0INT belongs to interrupt level
IRQ2, and is assigned the separate vector address, E6H.
The T0INT pending condition is automatically cleared by hardware when it has been serviced. Even though T0INT is
disabled, the application’s service routine can detect a pending condition of T0INT by the software and execute it’s
sub-routine. When this case is used, the T0INT pending bit must be cleared by the application subroutine by writing
a “0” to the T0CON.0 pending bit.
In interval timer mode, a match signal is generated when the counter value is identical to the values written to the T0
reference data registers, T0DATAH/L. The match signal generates a timer 0 match interrupt (T0INT, vector E4H) and
clears the counter.
If, for example, you write the value 0010H to T0DATAH/L and 0FH to T0CON, the counter will increment until it
reaches 10H. At this point, the T0 interrupt request is generated, the counter value is reset, and counting resumes.