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S3C8245/P8245/C8249/P8249 I/O PORTS
9-9
Port 2 Control Register,Low Byte (P2CONL)
E7H, Set 1, Bank 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
P2.2 (ADC2)
P2.1 (ADC1)
P2.0 (ADC0)
P2CONL bit-pair pin configuration:
00
01
10
11
Alternative function (ADC mode)
Output mode, push-pull
Input mode, pull-up
NOTE:
If a pin is enabled for ADC mode by ADCEN, normal I/O and
pull-up resistance are disabled.
When pins are enabled for ADC mode by ADCEN, the pins can
be selected for ADC input by ADCON.6.5.4.
P2.3 (ADC3)
Input mode
Figure 9-9. Port 2 Low-Byte Control Register (P2CONL)