Filter
Top Products
135
CHAPTER 6 COMMUNICATIONS AMONG CPU MODULES
6
6.1 Communications Using the CPU Shared Memory
6.1.2 Communications by auto refresh (using the multiple CPU high speed transmission area)
6.1.2 Communications by auto refresh (using the multiple CPU high
speed transmission area)
This section describes data communications by auto refresh using the multiple CPU high speed transmission area in
the CPU shared memory.
(1) Conditions for data communications
Data communications by auto refresh using the multiple CPU high speed transmission area can be performed
only when the following conditions are all met.
• A multiple CPU high-speed main base unit (Q35DB, Q38DB, or Q312DB) is used.
• A Universal model QCPU (except the Q00UCPU, Q01UCPU, and Q02UCPU) is used as CPU No.1.
• At least two of the following CPU modules are used.
• Universal model QCPU (except the Q00UCPU, Q01UCPU, and Q02UCPU)
• Motion CPU (Q172DCPU(-S1), Q173DCPU(-S1), Q172DSCPU, or Q173DSCPU)
• C Controller module (Q12DCCPU-V, Q24DHCCPU-V, or Q24DHCCPU-LS)
If any CPU module other than the above is mounted on the multiple CPU high-speed main base unit, set "0" to
the auto refresh points ("Points") of the relevant CPU module in "Multiple CPU High Speed Transmission Area
Setting" of PLC parameter.
Ex.
Setting "0" to the auto refresh points of CPU No.3
If all the conditions cannot be met, use the auto refresh area in the CPU shared memory. ( Page 122, Section 6.1.1)
Set "0" for the CPU module other
than the Universal model QCPU
(except the Q00UCPU, Q01UCPU,
and Q02UCPU), Motion CPU
(Q172DCPU(-S1), Q173DCPU(-S1),
Q172DSCPU, or Q173DSCPU), and
C Controller module (Q12DCCPU-V,
Q24DHCCPU-V or Q24DHCCPU-LS).