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*1 When the Q00UCPU, Q01UCPU, or Q02UCPU is used as CPU No.1, this type of communications cannot be performed.
Item Single CPU system Multiple CPU system Reference
Operation
Operation when a CPU
module is reset.
The entire system is reset by
resetting the Universal model
QCPU.
The entire system is reset by
resetting the Process CPU (CPU
No.1).
(Resetting CPU No.2 to No.4
individually is not allowed.)
Page 102,
Section 4.6
Operation when a stop error
has occurred in a CPU
module
The system stops.
If a stop error has occurred in the
Process CPU (CPU No.1), the
system stops. ("MULTI CPU
DOWN" (error code: 7000) occurs in
CPU No.2 to No.4.)
If a stop error has occurred in CPU
No.2 to No.4, the operation depends
on the parameter setting
("Operation Mode").
Page 102,
Section 4.6
Multiple CPU system
synchronized startup
Not supported
Whether to synchronize the startup
of CPU modules in the multiple CPU
system or not can be set.
(The default is set to be
synchronized.)
Page 168,
Section 6.5
Communications
between CPU
modules
Communications by auto
refresh using the CPU
shared memory
Not supported
Total of 4 Settings per CPU module:
up to 2K words,
Total of all CPU modules: 8K words
Page 122,
Section 6.1.1
Communications by auto
refresh using the multiple
CPU high speed
transmission area
*1
Not supported
Total memory capacity used by all
CPU modules:
2 CPU modules: 14K words,
3 CPU modules: 13K words,
4 CPU modules: 12K words
Page 135,
Section 6.1.2
Communications by
programs using the CPU
shared memory
Not supported
Data communications is performed
by using the TO, FROM instructions,
and instructions using the cyclic
transmission area device
(U3En\G).
Page 150,
Section 6.1.3
Communications between
Universal model QCPU and
Motion CPU
Not supported
Data communications is performed
by using five motion dedicated
instructions and three multiple CPU
transmission dedicated instructions.
Page 160,
Section 6.2,
Page 162,
Section 6.3.1
Communications between
Universal model QCPU and
C Controller module/PC
CPU module
Not supported
Data communications is performed
by using the multiple CPU
transmission dedicated instruction.
Page 164,
Section 6.3.2
Communications between
Universal model QCPUs
Not supported
Data communications is performed
by using two multiple CPU high-
speed transmission dedicated
instructions.
Page 165,
Section 6.3.3
Scan time
Factors that increase scan
time
• Writing data during RUN
• Time reserved for
communication processing
• Writing data during RUN
• Time reserved for communication
processing
• Refresh processing among CPU
modules in a multiple CPU
system
• Waiting time
Page 192,
Appendix 4