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6.1 Communications Using the CPU Shared Memory
This section describes data communications among CPU modules in a multiple CPU system using the CPU shared
memory.
(1) CPU shared memory
The CPU shared memory is a data storage area in a CPU module and used to read/write data among CPU
modules in a multiple CPU system.
The CPU shared memory consists of the areas listed below.
Use of the multiple CPU high speed transmission area enables high-speed transmission by reducing the increase in scan
time. Some conditions apply to using the area.
• Data communications by auto refresh: Page 135, Section 6.1.2
• Data communications by programs: Page 150, Section 6.1.3
Area Description Reference
Host CPU operation information area
An area used to store error information and LED status of the CPU
module
Page 119, Section 6.1 (2),
Page 121, Section 6.1 (3)
System area An area used by the operating system of the CPU module –
Auto refresh area
An area used to communicate data by auto refresh.
This area starts from the next address of the last address in the
system area.
Page 119, Section 6.1 (2),
Page 122, Section 6.1.1
User setting area
An area used to communicate data by a program.
This area is assigned to the later addresses of those used for the
auto refresh area. If auto refresh is not performed, the area starts
from the next address of the last address in the system area.
Page 119, Section 6.1 (2),
Page 150, Section 6.1.3
Multiple CPU high speed
transmission area
An area to communicate data with other CPU modules in the
multiple CPU system using Universal model QCPUs (except the
Q00UCPU, Q01UCPU, and Q02UCPU)
Page 119, Section 6.1 (2)
User setting area
An area used to communicate data by a program.
This area is assigned to the address 10000
H
and later of the CPU
shared memory.
Page 150, Section 6.1.3
Auto refresh area An area used to communicate data by auto refresh Page 135, Section 6.1.2