20 Chapter 1
South Bridge
System Clock
Item Specification
General
Information
The Intel ICH8 is the other main component of the Intel Broadwater
chipset that integrates many I/O functions and provides the I/O subsystem
with access to the rest of the platform.
Feature • 609-pin BGA package
• Direct Media Interface (DMI) to the GMCH
• PCI Express specification, revision1.0 compliant
• Four PCI Express Root ports support
• PCI local bus specification, revision 2.3 compliant with support for
33MHz PCI operations (seven PCI Request/Grant pairs support)
• ACPI power management logic support
• Enhanced DMA controller, interrupt controller, and timer functions
• Integrated Serial ATA host controller with independent DMA operation
on four ports and AHCI support
• USB host interface with support for eight USB ports; four UHCI host
controllers; one EHCI high speed USB 2.0 host controller
• System Management Bus (SMBus) specification, version 2.0 with
additional support for I
2
C devices
• Azalia specification support
• Low pin count (LPC) interface support
• I/O APIC 2.0
Item Specification
General
information
All clocks are generated by G965 and CK505.
Clock
synthesizer
• Host: 133/200/266MHz (system bus 533/800/1066MHz)
• Memory system (DDR2): 533/667/800MHz
• PCI: 33MHz
• PCI Express: 100MHz
• DMI: 100MHz
• USB: 48MHz
• 1394: 33MHz
• SIO: 33MHz
• ICH8: 14.318, 33, 48, and 100MHz
• RTC: 32.768KHz
• LAN: 25MHz
